Build with us
Build what ships. Not what demos.
Compilers, ISA extensions, AI frameworks — on production silicon, upstream, for the architectures that will run the next decade of AI. If you want your commits in GCC, LLVM, and the Linux kernel, you're in the right place.
Deep technical work
Your code ships in production compilers and silicon. No busywork — contributions go upstream to GCC, LLVM, and the Linux kernel.
Remote-first
Fully distributed, async-friendly team. Work from wherever you do your best thinking.
Shaping the field
We work with semiconductor companies before silicon is committed. Your input changes what gets built.
Open positions
Engineering Architect, AI & HPC Compilation
MLIR pipelines, graph lowering, kernel optimisation. You work at the frontier where AI frameworks and HPC runtimes meet hardware — building the compilation pipelines that turn models and simulations into machine code that actually uses what the silicon provides.
Engineering Architect, AI & HPC Frameworks
PyTorch, TensorFlow, ONNX Runtime, Julia — not as a user, but as someone who knows why inference or simulation is slow and whether the fix is in the framework, the runtime, the MLIR pipeline, or the compiler. You make frameworks deliver what the silicon promises.
Engineering Architect, Compilers
GCC, LLVM, and MLIR — both backends, all communities. You work where internal silicon teams can't — across compiler boundaries, across architectures, across languages from Fortran to Julia, pushing optimisations that production teams don't have the bandwidth or the depth to attempt.
Engineering Architect, ISA & Co-Design
You define the instructions that don't exist yet. Working at the boundary of silicon architecture and compiler implementation, you shape RISC‑V extensions for AI and HPC and prove them in software — before the hardware is committed.
Engineering Architect, Performance
Benchmarks don't improve performance. Architectural insight does. You turn profiling data into the engineering decisions that change what the hardware delivers — across AI inference, HPC simulation, and everything in between.
Engineering Architect, Platform & Ecosystem
You make silicon usable. Linux bring-up, SDK delivery, DPDK, RVA compliance, HPC stack integration — the full-stack work that turns a technically capable chip into something AI and HPC developers can build on and customers can ship.
Engineering Architect, Standards & Community
You represent VRULL where it matters — RISC‑V International working groups, GCC/LLVM/MLIR governance, HPC consortia, industry conferences. Technically credible enough to argue encoding trade-offs. Articulate enough to win the room.
Don't see the right role?
We're always interested in exceptional compiler, performance, and systems engineers. Send us a note.
Get in touch