Open position
Engineering Architect, Platform & Ecosystem
Why this role exists
A chip without a software ecosystem is a datasheet. Silicon companies know this — and they still underinvest in the ecosystem work because it’s broad, unglamorous, and requires a depth of systems knowledge that’s hard to hire for. Board support, Linux bring-up, DPDK enablement, HPC runtime integration, SDK packaging, compliance testing — none of this is one person’s specialty, but all of it has to work before a chip can ship.
VRULL does the ecosystem work that internal platform teams can’t staff or can’t prioritise. We take a chip from “boots Linux” to “developers can deploy AI inference and run HPC workloads in production” — and we do it against timelines that match tape-out schedules, not annual planning cycles.
The ecosystem challenge is widening. AI workloads need PyTorch and ONNX Runtime to work. HPC workloads need Fortran compilers, MPI stacks, and numerical libraries that actually vectorise. Emerging workloads need Julia packages that leverage the hardware. The platform engineer who can deliver all of this — and make it feel like a coherent SDK rather than a pile of individually working components — is the person who turns silicon into a product.
The reason this works as a single role at VRULL is AI-enabled throughput. The mechanical parts of bring-up, configuration, test scaffolding, and documentation are compressed. What remains is the systems-level judgement that knows which driver needs attention first, which compliance gap will block the customer’s certification, and which SDK design decision will haunt the developer community for years.
What you’ll do
- Lead platform bring-up on new RISC‑V silicon — Linux kernel, bootloader, device tree, driver enablement
- Build and deliver SDKs that silicon partners ship to their customers — toolchains, AI and HPC libraries, documentation, examples
- Enable and optimise DPDK, networking stacks, MPI, and system libraries for RISC‑V targets
- Integrate AI frameworks (PyTorch, ONNX Runtime) and HPC stacks (Fortran runtime, numerical libraries, Julia packages) into coherent platform deliverables
- Drive RVA profile compliance and conformance testing — ensuring silicon meets the standards that the ecosystem depends on
- Contribute upstream to Linux, DPDK, GCC, LLVM, and other foundational projects
- Build the developer tooling and documentation that turns a chip into a platform
What we’re looking for
- Broad systems expertise — Linux kernel, bootloaders, driver development, cross-compilation, packaging
- Experience with platform bring-up on new or pre-silicon hardware
- Familiarity with both AI and HPC software stacks — you understand what it takes to ship a platform that serves both communities
- Upstream contributor standing in at least one major system-level open-source project
- Understanding of RISC‑V RVA profiles and platform specifications
- The ability to context-switch across layers — kernel one day, SDK packaging the next, DPDK optimisation the day after, Julia integration the day after that — without losing depth
- Active community engagement: you build relationships in the projects you contribute to
What sets you apart
- Experience bringing up Linux on hardware that didn’t have an ecosystem before
- DPDK contributor history or networking-stack development experience
- Track record of shipping SDKs that serve both AI and HPC developers
- Experience integrating modern language ecosystems (Julia, Rust) alongside traditional stacks (Fortran, C/C++)
- The breadth to see the full platform and the depth to debug any layer of it
Most platform roles are about maintaining an existing stack. This one is about building the stack from scratch on silicon that’s still warm from the fab — for workloads that span AI inference to HPC simulation — and making it good enough that developers choose it over the incumbent.
Interested in this role?
Send your CV and a note about why this role interests you to careers@vrull.eu.
Apply for this role