Engagement Models
Three ways in. Start anywhere.
Bringing competitive silicon to market takes ISA influence, production engineering, and a software ecosystem that's ready when the chip is. Some clients come to us for one. Most end up needing all three. Either way, it's the same team — engineers who've shipped compilers, frameworks, and silicon software on hard deadlines — working at whichever layer your gap is.
01
Strategic Advisory
Ecosystem influence, backed by implementation.
Best fit: You're shaping next-generation silicon and need influence in the standards process from engineers who implement, not just advise.
We represent you in RISC‑V standards bodies with something most advisors lack: we've built the compilers, shipped the frameworks, and know where ISA decisions break real workloads. Your extensions get shaped by engineers who'll implement them. That's not advisory — that's leverage. Most standards participation is reactive — reviewing drafts, filing comments, attending calls. We drive specifications because we can prototype, validate against production workloads, and demonstrate what works. When a proposal has our implementation behind it, it moves.
In practice
- Standards body representation with implementation authority
- ISA extension co-design and architectural review
- Competitive analysis and technology roadmap input
- Priority access to VRULL's engineering validation stack
- Ecosystem intelligence briefings
02
Project-Based Engineering
Scoped. Staffed. Shipped.
Best fit: You have a specific engineering gap, a deadline that doesn't move, and no tolerance for onboarding overhead.
Compiler backend for a custom extension. DPDK port to RISC‑V. Auto-vectorisation that turns your ISA features into benchmark wins. We scope it tight, staff it with engineers who've delivered exactly this, and hand you production code — not a prototype with caveats. No ramp-up. No learning your toolchain on your timeline. Our engineers have upstream commit history in the projects you need modified. The deliverable is production-ready, documented, and — where applicable — upstreamed so you're not carrying patches forever.
In practice
- GCC and LLVM development for custom targets
- Performance analysis, profiling, and optimisation
- Simulator and formal model development (QEMU, SAIL)
- Framework and runtime porting
- Upstream open-source contributions
03
Platform Enablement
Everything between silicon and developers.
Best fit: You're bringing silicon to market, and the software ecosystem is the difference between a chip and a product your customers can actually build on.
Your chip tapes out once. The software ecosystem around it decides whether it's a product or a paperweight. We bring up the full stack — toolchain, OS, AI frameworks, SDK — and upstream it so your platform ships on an ecosystem, not a vendor island. This isn't a one-off delivery. We build the stack, validate it against your target workloads, certify conformance, and maintain upstream tracking so your platform stays current. When your customers file toolchain bugs, they hit mainline — not your fork.
In practice
- Full toolchain bring-up (compiler, assembler, linker, debugger)
- OS and runtime porting (Linux, RTOS)
- AI framework integration (PyTorch, TensorFlow, ONNX Runtime)
- SDK development and developer documentation
- Conformance and compliance testing
- Ongoing maintenance and upstream tracking
Not sure which fits? Tell us what you're building.
Most conversations start with a problem, not a model. We'll figure out the right fit together.